San-ei Kagaku has provided excellent products since 1959. Starting in 1992, Sanei was the first company to introduce permanent hole plugging materials to the PCB market. Over the years, they have released several different non-conductive pastes that are appropriate for all types of circuit board applications. Their pastes are known for being easy to sand during planarization, superior hole filling capability and excellent final performance properties. Besides hole fill materials, Sanei provides other specialty materials, such as gap fill for high circuit technology and also specialty solder masks for various applications.

Via Fill Pastes from San-ei Kagaku

Minimal Z-Axis expansion under stress allows intricate build-up designs
 Excellent paste hardness after cure enables flat pads after sanding

Features:

IR-6P series of pastes are ideal pastes for all circuit board applications, including computing, telecom, industrial, networking, MIL, aerospace. The pastes are economic, very simple to process with features, such as single step cure, excellent fill performance, ease of sanding, and have very reliable final performance properties.
The IR-10F series was designed for very high-end circuit board applications in mind. The material toughness is unrivaled with respect to final performance properties. Due to this excellent performance, this paste has become a standard in the North American market for high-end, long term performance applications.  The combination of an ideal Tg, modulus and CTE values enables this paste to usually outperform all others when longevity material property tests are performed.

Gap Fill Pastes from San-ei Kagaku

Gap fill used on an outer layer and then planarized to create a completely level surface, even with the Cu traces, regardless of the topography
Gap fill can be use for both inner and outer layers depending on your needs

Features:

Gap-Fill is an exciting new product from San-ei that is perfect for boards with high copper. It can be applied easily to any board and flows to fill in the valleys between copper traces before flattening out and creating a level surface. It can be used for either the inner or outer layers. This helps control solder resist thickness in the outer layers and prevent voids under the pre-preg from developing during lamination.
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